The present invention relates to semiconductor device fabrication and, more specifically, to device structures and design structures for a silicon controlled rectifier, as well as methods for fabricating a silicon controlled rectifier.
A silicon-controlled rectifier (SCR) is a four-layer solid state device utilized in current control applications. The SCR includes three electrodes or terminals, namely an anode, a cathode, and a gate, that are distributed among the four layers. In its quiescent state, the SCR restricts current conduction to leakage current. However, a signal applied to the gate that causes the gate-to-cathode voltage to exceed an engineered threshold, known as the trigger voltage, can initiate the conduction of a forward current between the anode and cathode. In response to the triggering signal being removed from the gate, the SCR conducts current as long as the conducted current remains above an engineered holding current. When the conducted current drops below the holding current, the SCR returns to its quiescent state.
A chip may be exposed to random electrostatic discharge (ESD) events that can direct potentially large and damaging ESD currents to the integrated circuits of the chip. Precautions may be taken to avoid causing ESD events or to militate against the effect of an ESD event. One such precaution is to incorporate an ESD prevention circuit into the chip. The ESD protection circuit prevents damage to the sensitive devices of the integrated circuits during post-manufacture chip handling and after chip installation on a circuit board or other carrier. If an ESD event occurs, the ESD protection circuit triggers an ESD protection device, such as a silicon-controlled rectifier, to enter a low-impedance, conductive state that directs ESD current to ground and away from the sensitive devices in the integrated circuits on the chip. The ESD protection device clamps the ESD protection device in its conductive state until the ESD current is drained and the ESD voltage is discharged to an acceptable level. In this fashion, the ESD prevention circuit prevent the ESD event from inflicting damage upon the integrated circuits of the chip.
Improved device structures, fabrication methods, and design structures are needed for a silicon controlled rectifier.